Arm Cortex-M4

Arm has announced its latest architecture, the 64bit-only Armv9.2, and three grades of processor built on it that can have software switched across them on-the-fly (Arm’s big.Little concept) to instantly trade power for performance inside phones.

At the top-end of single-thread performance will be Cortex-X4, then Cortex-A720 in the middle, and Cortex-A520 at the power-saving bottom.

“We are not only delivering the highest performing Arm Cortex CPU through the Cortex-X4, but also introducing the most powerful Cortex CPU compute cluster ever built,” claimed the company.

Sharing code across clusters of cores is the DSU-120 that can work with up to 14 cores, with L3 cache options of 24 and 32Mbyte.

“From a 10x Cortex-X4 and 4x Cortex-A720 CPU cluster for high-performance laptops, to the 1x Cortex-X4, 4x Cortex-A720 and 4x Cortex-A520 cluster for flagship smartphones, a scalable DSU is at the cornerstone of Arm’s new total compute solution – TCS23,” it said.

It also has an octo-core configuration in mind: One Cortex-X4, five Cortex-A720 and a pair of Cortex-A520, but there are any possible combinations.

Compared with the previous generation of phone cluster cores:

Cortex-X4 is said to have 15% more performance than the X3 (SPECRate2017_int_base for 2MB L2, 8MB L3, 3.4GHz, 100ns latency X4 vs Cortex-X3 in phone shipping March 2023) and 40% better power efficiency (matched peak SPECRate2017_int_base performance, same X4 and X3)

Cortex-A720 is said to deliver 20% better power efficiency compared to Cortex-A715 (SPECint_base2006, 32kB L1, 512kB L2, 8MB L3 Cortex-A720 vs same cache Cortex-A715, same process, same frequency).

Cortex-A78 remains popular due to its small footprint, said Arm, and Cortex-A720 can be stripped-down to match this area, while boosting performance by 10% (SPECint_base2006, 32kB L1, 128kB L2, 2MB L3 ‘area optimised’ Cortex-A720 vs 32kB L1, 256kB L2, 2MB L3 Cortex-A78, same process, same frequency).

Cortex-A520 is said to be 22% more power efficient than the earlier Cortex-A510 (SPECint_base2006,  32kB L1, 256kB L2 (shared with second A520), 4MB L3 Cortex-A520 vs 32kB L1, 256kB L2 (shared with second A510), 4MB L3 year-2022 Cortex-A510, same process, same frequency), while being able to be deliver 8% more performance (as before).