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TSMC 2D GAA Transistor

At the 75th IEDM from December 3rd to the 7th in San Francisco, TSMC is giving a paper on a 2D nanosheet GAA transistor.


The transistor with a 40nm gate width produced a drive current of 410microamps per micron at Vds of 1V.


TSMC uses a transition-metal dichalcogenide monolayer for the semiconducting channel in a nanosheet transistor.

TSMC has integrated hafnium-based dielectrics formed by atomic layer deposition with the monolayer TMD material MoS2, to build a top-gated nFET with a physical dielectric thickness of 3.4 nm and an electrically equivalent oxide thickness (EOT) of ~1 nm. 

The subthreshold voltage swing is less than 70mV/dec. and this indicates low leakage current when transistors are turned off.

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